Verification Design Engineer Salaries
381 verified profilesAverage Annual Total Compensation is $204k
Employees as Verification Design Engineer earn an average of $204k, mostly ranging from $158k to $456k based on 381 profiles.
Similar Searches
Base: $168k Stocks: $35k (Today) (35.1%) $47k Bonus: $18k TC:$221k (Today) (5.6%) $233k | 10.6yrs | Masters in electrical and electronics engineering | Works in Oregon, United States | ||||
Base: $185k Stocks: $55k (Today) (30.4%) $72k Bonus: $16k TC:$256k (Today) (6.5%) $273k | 7.5yrs | Masters in computer engineering | Works in Cupertino, California, United States | ||||
Design Verification Engineer
(IC3) Female | Base: $175k Stocks: $49k (Today) (0.2%) $48k Bonus: - TC:$223k (Today) (0.0%) $223k | 5yrs | NA | Masters | Works in Santa Clara, CA | ||
Design Verification Engineer
(Garde 5) | Base: $121k Stocks: $6k (Today) (50.0%) $3k Bonus: $14k TC:$141k (Today) (2.1%) $138k | 2.5yrs | Masters | Works in Folsom | |||
Design Verification Engineer
(Grade 7) | Base: $188k Stocks: $39k (Today) (147.4%) $97k Bonus: $15k TC:$242k (Today) (23.9%) $300k | 10yrs | NA | Masters | Works in Santa Clara, CA | ||
|
| |||||||
Senior Design Verification Engineer
(Grade 7) Male | Base: $176k Stocks: $39k (Today) (158.2%) $101k Bonus: - TC:$216k (Today) (28.8%) $278k | 8yrs | NA | Masters | Works in Santa Clara, CA | ||
Base: $99k Stocks: - Bonus: - TC:$99k | 3.3yrs | Masters in electrical and computer engineering | Works in Austin, Texas, United States | ||||
Senior Design Verification Engineer
(Senior Hardware Engineer) Female | Base: $208k Stocks: $34k Bonus: $31k TC:$273k | 17yrs | NA | Bachelors | Works in San Francisco, CA | ||
Design Verification Engineer
(ICT3) Male | Base: $150k Stocks: $63k Bonus: $15k TC:$228k | 3yrs | NA | Phd | Works in San Diego, CA | ||
Design Verification Engineer
(L5) Male | Base: $184k Stocks: $116k Bonus: $28k TC:$328k | 16yrs | NA | Masters | Works in Austin, TX | ||
100% real time & verified!
How much do Verification Design Engineer employees make?
Employees as Verification Design Engineer earn an average of $204k, mostly ranging from $158k per year to $456k per year based on 381 profiles. The top 10% of employees earn more than $282k per year.
What is the average salary of Verification Design Engineer?
Average salary of an employee as Verification Design Engineer is $204k.
What is the highest salary offered as Verification Design Engineer?
Highest reported salary offered as Verification Design Engineer is $544k. The top 10% of employees earn more than $282k per year. The top 1% earn more than a whopping $456k per year.
What are the most common skills required as Verification Design Engineer?
3% of employees have skills in computer architecture . 2% also know test planning . 2% also know assertions .
What are the highest paying jobs as Verification Design Engineer?
The top 5 highest paying jobs as Verification Design Engineer with reported salaries are:
hardware engineer - $206k per year
design verification engineer - $171k per year
What are the new grad salaries as Verification Design Engineer?
hardware engineer - $147k per year
Which are the top locations?
What is the median salary offered as Verification Design Engineer?
The median salary approximately calculated from salary profiles measured so far is $186k per year.
How is the age distributed among employees as Verification Design Engineer?
38% of employees lie between 26-31 yrs . 16% of the employees fall in the age group of 31-36 yrs .
What qualifications do employees have as Verification Design Engineer?
53% of employees have a PostGraduate degree. 16% hold a Graduate degree.
Which schools do employees working as Verification Design Engineer went to?
7% of employees studied at North Carolina State University . 4% studied at University of Southern California .
How much do Verification Design Engineer employees make?
Employees as Verification Design Engineer earn an average of $204k, mostly ranging from $158k per year to $456k per year based on 381 profiles. The top 10% of employees earn more than $282k per year.
What is the average salary of Verification Design Engineer?
Average salary of an employee as Verification Design Engineer is $204k.
What is the highest salary offered as Verification Design Engineer?
Highest reported salary offered as Verification Design Engineer is $544k. The top 10% of employees earn more than $282k per year. The top 1% earn more than a whopping $456k per year.
What are the most common skills required as Verification Design Engineer?
3% of employees have skills in computer architecture . 2% also know test planning . 2% also know assertions .
What are the highest paying jobs as Verification Design Engineer?
The top 5 highest paying jobs as Verification Design Engineer with reported salaries are:
hardware engineer - $206k per year
design verification engineer - $171k per year
What are the new grad salaries as Verification Design Engineer?
hardware engineer - $147k per year
Which are the top locations?
What is the median salary offered as Verification Design Engineer?
The median salary approximately calculated from salary profiles measured so far is $186k per year.
How is the age distributed among employees as Verification Design Engineer?
38% of employees lie between 26-31 yrs . 16% of the employees fall in the age group of 31-36 yrs .
What qualifications do employees have as Verification Design Engineer?
53% of employees have a PostGraduate degree. 16% hold a Graduate degree.
Which schools do employees working as Verification Design Engineer went to?
7% of employees studied at North Carolina State University . 4% studied at University of Southern California .
- < 100 k
- 100-200 k
- 200-300 k
- 300-400 k
- 400-500 k
- 21-26 yrs
- 26-31 yrs
- 31-36 yrs
- 36-41 yrs
- > 41 yrs
Browse by Companies
See All
Microsoft
Amazon
Apple
Intel
Uber
Cisco Systems
NVIDIA
Oracle America
Browse by Titles
See All
Software Engineer
Business Analyst
Product Manager
Engineering Manager
Program Manager
Data Scientist
Account Manager
UX Designer
DevOps Engineer
