Qualcomm Senior Design Verification Engineer Salaries

69 verified profiles
Last updated on December 21, 2024
Average Annual Total Compensation is $323k

Employees at Qualcomm as Senior Design Verification Engineer earn an average of $323k, mostly ranging from $323k to $323k based on 69 profiles.

Employee Count
massive
Equity Vest
3 yrs ; 33% , 33% , 33%
Signing Bonus
$20k - $25k
  3,754 people laid off in the last year.
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Salary Profiles
Company
Title(Level)
Annual Salary
Experience
School
Degree
Location
Skills
Design Verification (Senior Staff Engineer)

Base: $191k

Stocks: $88k

Bonus: $44k

TC:$323k

16yrs
NA
NA

Works in Santa Clara, CA

Base: $184k

Stocks: -

Bonus: -

16yrs
Master's in electronics

Works in San Jose, CA

Lives in san jose (95129)

Base: $194k

Stocks: -

Bonus: -

14yrs
Master's in electrical engineering

Works in San Jose, CA

Lives in san jose (95133)

Base: $107k

Stocks: -

Bonus: -

3yrs
Master's in electrical engineering

Works in Santa Clara, CALIFORNIA

Lives in san jose (95131)

Base: $106k

Stocks: -

Bonus: -

7yrs
Master's in electrical engineering

Works in San Diego, CALIFORNIA

Lives in san diego (92128)

Base: $106k

Stocks: -

Bonus: -

6yrs
Master's in electrical and computer engineering

Works in San Diego, CALIFORNIA

Lives in san diego (92129)

Base: $106k

Stocks: -

Bonus: -

3yrs
Master's in computer engineering

Works in San Diego, CALIFORNIA

Lives in san diego (92126)

Base: $106k

Stocks: -

Bonus: -

4yrs
Master's in computer engineering

Works in San Diego, CALIFORNIA

Lives in san diego (92126)

Base: $107k

Stocks: -

Bonus: -

5yrs
Master's in electrical engineering

Works in San Jose, CALIFORNIA

Lives in santa jose (95134)

Base: $106k

Stocks: -

Bonus: -

5yrs
Master's in electrical and computer engineering

Works in San Diego, CALIFORNIA

Lives in san diego (92122)

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Frequently asked questions
How much do Qualcomm Senior Design Verification Engineer employees make?

Employees at Qualcomm as Senior Design Verification Engineer earn an average of $323k, mostly ranging from $323k per year to $323k per year based on 69 profiles. The top 10% of employees earn more than $323k per year.

What is the average salary of Qualcomm Senior Design Verification Engineer?

Average salary of an employee at Qualcomm as Senior Design Verification Engineer is $323k.

What is the highest salary offered at Qualcomm as Senior Design Verification Engineer?

Highest reported salary offered at Qualcomm as Senior Design Verification Engineer is $323k. The top 10% of employees earn more than $323k per year. The top 1% earn more than a whopping $323k per year.

What are the most common skills required at Qualcomm as Senior Design Verification Engineer?

4% of employees have skills in computer architecture . 3% also know embedded systems . 3% also know perl .

What are the highest paying jobs at Qualcomm as Senior Design Verification Engineer?

The top 5 highest paying jobs at Qualcomm as Senior Design Verification Engineer with reported salaries are:

What is the median salary offered at Qualcomm as Senior Design Verification Engineer?

The median salary approximately calculated from salary profiles measured so far is $323k per year.

How is the age distributed among employees at Qualcomm as Senior Design Verification Engineer?

This group has a predominantly younger workforce. 61% of employees lie between 26-31 yrs . 23% of the employees fall in the age group of 31-36 yrs .

What qualifications do employees have at Qualcomm as Senior Design Verification Engineer?

78% of employees have a PostGraduate degree. 19% hold a Graduate degree.

Which schools do employees working at Qualcomm as Senior Design Verification Engineer went to?

6% of employees studied at North Carolina State University . 6% studied at University of California .

Frequently asked questions
How much do Qualcomm Senior Design Verification Engineer employees make?

Employees at Qualcomm as Senior Design Verification Engineer earn an average of $323k, mostly ranging from $323k per year to $323k per year based on 69 profiles. The top 10% of employees earn more than $323k per year.

What is the average salary of Qualcomm Senior Design Verification Engineer?

Average salary of an employee at Qualcomm as Senior Design Verification Engineer is $323k.

What is the highest salary offered at Qualcomm as Senior Design Verification Engineer?

Highest reported salary offered at Qualcomm as Senior Design Verification Engineer is $323k. The top 10% of employees earn more than $323k per year. The top 1% earn more than a whopping $323k per year.

What are the most common skills required at Qualcomm as Senior Design Verification Engineer?

4% of employees have skills in computer architecture . 3% also know embedded systems . 3% also know perl .

What are the highest paying jobs at Qualcomm as Senior Design Verification Engineer?

The top 5 highest paying jobs at Qualcomm as Senior Design Verification Engineer with reported salaries are:

What is the median salary offered at Qualcomm as Senior Design Verification Engineer?

The median salary approximately calculated from salary profiles measured so far is $323k per year.

How is the age distributed among employees at Qualcomm as Senior Design Verification Engineer?

This group has a predominantly younger workforce. 61% of employees lie between 26-31 yrs . 23% of the employees fall in the age group of 31-36 yrs .

What qualifications do employees have at Qualcomm as Senior Design Verification Engineer?

78% of employees have a PostGraduate degree. 19% hold a Graduate degree.

Which schools do employees working at Qualcomm as Senior Design Verification Engineer went to?

6% of employees studied at North Carolina State University . 6% studied at University of California .

Salary Brackets
Percentage
300-400 k 300-400 k
Percentage : 1
Age Brackets
Percentage
21-26 yrs 21-26 yrs
Percentage : 7
26-31 yrs 26-31 yrs
Percentage : 61
31-36 yrs 31-36 yrs
Percentage : 23
36-41 yrs 36-41 yrs
Percentage : 4
> 41 yrs > 41 yrs
Percentage : 1
Skills
Trending
computer architecture
4 %
embedded systems
3 %
perl
3 %
analog circuit design
1 %
assertions
1 %
axi
1 %
c
1 %
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