Intel Design Verification Engineer Salaries
23 verified profilesAverage Annual Total Compensation is $178k
Employees at Intel as Design Verification Engineer earn an average of $178k, mostly ranging from $147k to $244k based on 23 profiles.
Employee Count
massive
Signing Bonus
$7k
| 👩🏼💻 Asian | $178k Asian Average Salary : $ 178 k |
|---|
Base: $168k Stocks: $35k (Today) (130.3%) $81k Bonus: $18k TC:$221k (Today) (20.6%) $267k | 10.6yrs | Masters in electrical and electronics engineering | Works in Oregon, United States | ||||
Design Verification Engineer
(Garde 5) | Base: $121k Stocks: $6k (Today) (13.3%) $5k Bonus: $14k TC:$141k (Today) (0.6%) $140k | 2.5yrs | Masters | Works in Folsom | |||
Design Verification Engineer
(Grade 7) | Base: $188k Stocks: $39k (Today) (322.2%) $166k Bonus: $15k TC:$242k (Today) (52.2%) $368k | 10yrs | NA | Masters | Works in Santa Clara, CA | ||
Senior Design Verification Engineer
(Grade 7) Male | Base: $176k Stocks: $39k (Today) (340.6%) $173k Bonus: - TC:$216k (Today) (61.9%) $349k | 8yrs | NA | Masters | Works in Santa Clara, CA | ||
DFT Design Verification Engineer
(Grade 8) Male | Base: $162k Stocks: $43k Bonus: $36k TC:$241k | 23yrs | NA | Bachelors | Works in Austin, TX | ||
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Design Verification Engineer
(Grade 8) Male | Base: $156k Stocks: $44k Bonus: $24k TC:$224k | 16yrs | NA | Masters | Works in Folsom, CA | ||
Design Verification Engineer
(Grade 5) Male | Base: $112k Stocks: $19k Bonus: $12k TC:$143k | 2yrs | NA | Masters | Works in Austin, TX | ||
Design Verification Engineer
(Grade 7) Male | Base: $123k Stocks: $4k Bonus: $12k TC:$138k | 9yrs | NA | Masters | Works in Austin, TX | ||
Pre-silicon Design Verification Engineer
(Grade 7) Male | Base: $118k Stocks: $14k Bonus: $15k TC:$146k | 5yrs | NA | Masters | Works in Folsom, CA | ||
Design Verification Engineer
(L6) Male | Base: $129k Stocks: $29k Bonus: $5k TC:$164k | 2yrs | NA | Masters | Works in Santa Clara, CA | ||
100% real time & verified!
Level
Experience
Avg
25th
50th
75th
90th
95th
Level
Level
Level
Intel Design Verification Engineer salary levels ranges from Grade 5 (Hardware Engineer) upto Grade 8 (Hardware Engineer), with Grade 8 (Hardware Engineer) level earning average salary of $228k along with $37k worth of stock options.
How much do Intel Design Verification Engineer employees make?
Employees at Intel as Design Verification Engineer earn an average of $178k, mostly ranging from $147k per year to $244k per year based on 23 profiles. The top 10% of employees earn more than $238k per year.
What is the average salary of Intel Design Verification Engineer?
Average salary of an employee at Intel as Design Verification Engineer is $178k.
What is the highest salary offered at Intel as Design Verification Engineer?
Highest reported salary offered at Intel as Design Verification Engineer is $245k. The top 10% of employees earn more than $238k per year. The top 1% earn more than a whopping $244k per year.
What are the most common skills required at Intel as Design Verification Engineer?
9% of employees have skills in uvm . 4% also know c . 4% also know c++ .
What are the highest paying jobs at Intel as Design Verification Engineer?
The top 5 highest paying jobs at Intel as Design Verification Engineer with reported salaries are:
hardware engineer - $178k per year
What is the median salary offered at Intel as Design Verification Engineer?
The median salary approximately calculated from salary profiles measured so far is $164k per year.
How is the age distributed among employees at Intel as Design Verification Engineer?
What qualifications do employees have at Intel as Design Verification Engineer?
Which schools do employees working at Intel as Design Verification Engineer went to?
4% of employees studied at San Jose State University . 4% studied at Universiti Sains Malaysia .
Which are the top roles at this company?
How much do Intel Design Verification Engineer employees make?
Employees at Intel as Design Verification Engineer earn an average of $178k, mostly ranging from $147k per year to $244k per year based on 23 profiles. The top 10% of employees earn more than $238k per year.
What is the average salary of Intel Design Verification Engineer?
Average salary of an employee at Intel as Design Verification Engineer is $178k.
What is the highest salary offered at Intel as Design Verification Engineer?
Highest reported salary offered at Intel as Design Verification Engineer is $245k. The top 10% of employees earn more than $238k per year. The top 1% earn more than a whopping $244k per year.
What are the most common skills required at Intel as Design Verification Engineer?
9% of employees have skills in uvm . 4% also know c . 4% also know c++ .
What are the highest paying jobs at Intel as Design Verification Engineer?
The top 5 highest paying jobs at Intel as Design Verification Engineer with reported salaries are:
hardware engineer - $178k per year
What is the median salary offered at Intel as Design Verification Engineer?
The median salary approximately calculated from salary profiles measured so far is $164k per year.
How is the age distributed among employees at Intel as Design Verification Engineer?
What qualifications do employees have at Intel as Design Verification Engineer?
Which schools do employees working at Intel as Design Verification Engineer went to?
4% of employees studied at San Jose State University . 4% studied at Universiti Sains Malaysia .
Which are the top roles at this company?
| 100-200 k | 100-200 k Percentage : 65 |
|---|---|
| 200-300 k | 200-300 k Percentage : 35 |
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