Asic Engineer Design Verification Salaries
19 verified profilesAverage Annual Total Compensation is $238k
Employees as Asic Engineer Design Verification earn an average of $238k, mostly ranging from $236k to $297k based on 19 profiles.
| 👨💻 Male | $222k Male Average Salary : $ 222 k |
|---|
Base: $157k Stocks: $108k Bonus: - TC:$265k | 25yrs | NA | Masters | Works in Austin, TX | |||
Asic Design Verification Engineer
(L4) Male | Base: $163k Stocks: $111k Bonus: $24k TC:$298k | 6yrs | NA | Masters | Works in Sunnyvale, CA | ||
Asic Design Verification Engineer
(ICT2) Male | Base: $132k Stocks: $15k Bonus: - TC:$147k | 1yrs | NA | Masters | Works in Cupertino, CA | ||
Base: $182k Stocks: $49k (Today) (92.2%) $93k Bonus: $27k TC:$258k (Today) (17.3%) $303k | 9yrs | NA | NA | Works in Sunnyvale, CA | |||
Asic Design Verification Engineer
(L4) Male | Base: $149k Stocks: $44k Bonus: $29k TC:$222k | 0yrs | NA | NA | Works in Mountain View, CA | ||
Base: $153k Stocks: - Bonus: - | 12yrs | Master's in electrical and electronic engineering | Works in Santa Clara, CALIFORNIA Lives in sunnyvale (94086) | ||||
Base: $157k Stocks: - Bonus: - | 11yrs | Bachelor's in engineering | Works in SANTA CLARA, CA Lives in mountain view (94041) | ||||
Base: $157k Stocks: - Bonus: - | 15yrs | Bachelor's in electronics engineering | Works in Santa Clara, CA Lives in sunnyvale (94087) | ||||
Base: $152k Stocks: - Bonus: - | 16yrs | Bachelor's in electrical and computer engineering | Works in San Jose, CA Lives in worcester (01604-1128) | ||||
Base: $126k Stocks: - Bonus: - | 11yrs | Master's in vlsi-cad | Works in San Diego, CALIFORNIA Lives in san jose (95129) |
100% real time & verified!
How much do Asic Engineer Design Verification employees make?
Employees as Asic Engineer Design Verification earn an average of $238k, mostly ranging from $236k per year to $297k per year based on 19 profiles. The top 10% of employees earn more than $284k per year.
What is the average salary of Asic Engineer Design Verification?
Average salary of an employee as Asic Engineer Design Verification is $238k.
What are the new grad salaries as Asic Engineer Design Verification?
hardware engineer - $185k per year
What is the median salary offered as Asic Engineer Design Verification?
The median salary approximately calculated from salary profiles measured so far is $258k per year.
How is the age distributed among employees as Asic Engineer Design Verification?
26% of employees lie between 26-31 yrs . 26% of the employees fall in the age group of 31-36 yrs .
How much do Asic Engineer Design Verification employees make?
Employees as Asic Engineer Design Verification earn an average of $238k, mostly ranging from $236k per year to $297k per year based on 19 profiles. The top 10% of employees earn more than $284k per year.
What is the average salary of Asic Engineer Design Verification?
Average salary of an employee as Asic Engineer Design Verification is $238k.
What are the new grad salaries as Asic Engineer Design Verification?
hardware engineer - $185k per year
What is the median salary offered as Asic Engineer Design Verification?
The median salary approximately calculated from salary profiles measured so far is $258k per year.
How is the age distributed among employees as Asic Engineer Design Verification?
26% of employees lie between 26-31 yrs . 26% of the employees fall in the age group of 31-36 yrs .
| 100-200 k | 100-200 k Percentage : 5 |
|---|---|
| 200-300 k | 200-300 k Percentage : 21 |
| 26-31 yrs | 26-31 yrs Percentage : 26 |
|---|---|
| 31-36 yrs | 31-36 yrs Percentage : 26 |
| 36-41 yrs | 36-41 yrs Percentage : 16 |
| > 41 yrs | > 41 yrs Percentage : 5 |
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