Company	Title	Experience	Annual Salary	School	Skills
Arm Bengaluru	Verification Engineer	3.5yrs	Base: ₹26.8lakhs Stocks: - Bonus: - CTC:₹26.8lakhs	Model Engineering College Govt. Boys Higher Secondary School	Universal Verification Methodology (Uvm) Systemverilog Assertion Based Verification Functional Verification Code Coverage Formal Verification (Show More) Verilog-a Digital Electronics System On A Chip (Soc) Very-large-scale Integration (Vlsi)
Qualcomm Noida	Senior Design Engineer	5.2yrs		Indian Institute of Technology Sardar Patel Vidyalaya	Systemverilog Digital Designs Rtl Design Verilog Performance Analysis Cache Coherency (Show More) Computer Architecture Amba C++ Python
Microchip Technology Inc. Chennai	ASIC Verification Engineer	2.4yrs	Base: ₹12.8lakhs Stocks: - Bonus: - CTC:₹12.8lakhs	Model Engineering College Govt. Boys Higher Secondary School	Verilog-a Sv Ethernet Universal Verification Methodology (Uvm) Systemverilog Assertion Based Verification (Show More) Functional Verification Code Coverage Verilog Problem Solving Digital Electronics Formal Verification Linux Perl C C++ System On A Chip (Soc) Very-large-scale Integration (Vlsi) Application-specific Integrated Circuits (Asic) Microsoft Office
Marvel Technologies Pune	Senior Staff Engineer (t4)	13.3yrs		Sinhgad College of Engineering	System Verilog Verilog OVM SystemVerilog ASIC Open Verification Methodology (Show More) VLSI VHDL AMBA Embedded Systems Semiconductors Xilinx Compilers USB3.0 Functional Verification SoC RTL coding ModelSim Static Timing Analysis AMBA AHB TCL Debugging RTL design FPGA Veritas Cluster Server NCSim USB EDA RTL Design
Google Bengaluru	Design Verification Engineer	4yrs		Birla Institute of Technology	Python Scripting Universal Verification Methodology (Uvm) Systemverilog Digital Electronics Risc-v C (Show More)
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AMD Hyderabad	Silicon design engineer2	6yrs	Base: ₹23.5lakhs Stocks: ₹10.1lakhs (Today) (111.9%) ₹21.4L Bonus: ₹3.4lakhs CTC:₹37.0lakhs (Today) (30.5%) ₹48.3L	Krishna chaitanya Institute of Technology & Sciences	Workload Prioritization Task Management Agile Methodologies Code Coverage Microsoft Excel Microsoft Powerpoint (Show More) Jira Functional Verification Risc-v Universal Verification Methodology (Uvm) System Verilog Verilog Very-large-scale Integration (Vlsi) C Microsoft Office Matlab Vhdl Cmos Systemverilog
Centre for Development of Telematics (C-DOT) Bengaluru	Digital Design Engineer (Scientist B)	1.9yrs	Base: ₹10.1lakhs Stocks: - Bonus: - CTC:₹10.1lakhs	Indian Institute of Technology Hyderabad (IIT-H) Institute of Engineering & Technology DAVV	System On A Chip (Soc) Modelsim Lattice Diamond Software Cadence Schematic Capture Analog Layout Keysight Ads (Show More) Oops Hyperlynx Power Hyperlynx Signal Integrity Cadence Pcb Designer C++ C Assertions Based Verification Systemverilog Cadence Allegro Verilog Cadence Virtuoso Xilinx Vivado Comsol Ltspice Asitic Clewin Constraints Rtl Design CDC Synchonizers Static Timing Analysis I2C SPI Uart FIFO CORDIC
Signaltron India	Digital Design Engineer Male	1.7yrs	Base: ₹13.7lakhs Stocks: - Bonus: - CTC:₹13.7lakhs	Indian Institute of Technology Walchand College of Engineering(A Govt. Aided Autonomous Institute)	Pcie Gigabit Ethernet Cpri Systems Design I2c Hardware Design (Show More) Digital Hardware Design Communication Logic Design Digital Logic Digital Ic Design Digital Circuit Design Algorithm Design Verilog Rtl Design Axi Fpga Prototyping Static Timing Analysis Tcl Digital Designs Design Engineering Vhdl Cdc Very-large-scale Integration (Vlsi) Xilinx Embedded C Rtl Coding Digital Image Processing Python Silicon Functional Verification Field-programmable Gate Arrays (Fpga) Electrical Engineering Rtl Development Physical Design Interpersonal Skills Problem Solving Debugging Application-specific Integrated Circuits (Asic) Programming C C++ Matlab Html Microsoft Office Microsoft Powerpoint Microsoft Excel Microsoft Word Leadership Management Cadence Virtuoso Systemverilog
Siemens EDA (Siemens Digital Industries Software) Noida	Lead Member Technical Staff (T08)	5.9yrs	Base: ₹30.2lakhs Stocks: ₹5.0lakhs Bonus: ₹5.9lakhs CTC:₹41.1lakhs	Manav Rachna University DAV Public School	Universal Verification Methodology (Uvm) Systemverilog Hardware Verification C Python Object-oriented Programming (Oop) (Show More) Verilog Application-specific Integrated Circuits (Asic) Functional Verification Linux Git Displayport 2.0 Amba Axi Amba Axistream Amba Apb Tilelink Amba Ahb Risc-v I2c Mipi Dsi2 Usb3.0 Tanner Eda Tcl Vhdl Bash Microsoft Office Matlab .Net Framework Labview
AMD Hyderabad	Member of Technical Staff Male	9.7yrs	Base: ₹36.7lakhs Stocks: ₹8.7lakhs (Today) (64.4%) ₹14.3L Bonus: ₹1.9lakhs CTC:₹47.3lakhs (Today) (11.8%) ₹52.9L	Jawaharlal Nehru Technological University	System On A Chip (Soc) Universal Verification Methodology (Uvm) Perl Field-programmable Gate Arrays (Fpga) Application-specific Integrated Circuits (Asic) Digital Electronics (Show More) Very-large-scale Integration (Vlsi) C C++ Linux Verilog Vhdl Problem Solving Communication Systemverilog Open Verification Methodology Axi Ahb Synopsys Vcs Makefile Sv Power Management Apb Written Communication Python Debugging Functional Verification Semiconductors Risc-v Tilelink Wit Git Chisel Scala Object-oriented Programming (Oop) Microsoft Office Microsoft Excel Microsoft Powerpoint Microsoft Outlook Machine Learning

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Frequently asked questions

How much do Systemverilog employees make?

Employees who know Systemverilog earn an average of ₹39.3lakhs, mostly ranging from ₹22.9lakhs per year to ₹110.0lakhs per year based on 41 profiles. The top 10% of employees earn more than ₹67.3lakhs per year.

What is the average salary of Systemverilog?

Average salary of an employee who know Systemverilog is ₹39.3lakhs.

What is the highest salary offered who know Systemverilog?

Highest reported salary offered who know Systemverilog is ₹110.7lakhs. The top 10% of employees earn more than ₹67.3lakhs per year. The top 1% earn more than a whopping ₹110.0lakhs per year.

What are the most common skills required who know Systemverilog?

100% of employees have skills in systemverilog . 0% also know verilog . 0% also know c .

What are the highest paying jobs who know Systemverilog?

The top 5 highest paying jobs who know Systemverilog with reported salaries are:

staff engineer - ₹77.0lakhs per year
senior member of technical staff - ₹65.0lakhs per year
senior design engineer - ₹48.0lakhs per year
director - ₹48.0lakhs per year
design verification engineer - ₹29.0lakhs per year

Which are the top locations?

Bangalore

What is the median salary offered who know Systemverilog?

The median salary approximately calculated from salary profiles measured so far is ₹36.9lakhs per year.

How is the age distributed among employees who know Systemverilog?

34% of employees lie between 21-26 yrs . 29% of the employees fall in the age group of 26-31 yrs .

What qualifications do employees have who know Systemverilog?

5% hold a Graduate degree. 2% hold a PostGraduate degree.

Which schools do employees working who know Systemverilog went to?

20% of employees studied at Indian Institute of Technology . 10% studied at Govt. Boys Higher Secondary School .

Frequently asked questions

How much do Systemverilog employees make?

What is the average salary of Systemverilog?

Average salary of an employee who know Systemverilog is ₹39.3lakhs.

What is the highest salary offered who know Systemverilog?

What are the most common skills required who know Systemverilog?

100% of employees have skills in systemverilog . 0% also know verilog . 0% also know c .

What are the highest paying jobs who know Systemverilog?

The top 5 highest paying jobs who know Systemverilog with reported salaries are:

staff engineer - ₹77.0lakhs per year
senior member of technical staff - ₹65.0lakhs per year
senior design engineer - ₹48.0lakhs per year
director - ₹48.0lakhs per year
design verification engineer - ₹29.0lakhs per year

Which are the top locations?

Bangalore

What is the median salary offered who know Systemverilog?

The median salary approximately calculated from salary profiles measured so far is ₹36.9lakhs per year.

How is the age distributed among employees who know Systemverilog?

34% of employees lie between 21-26 yrs . 29% of the employees fall in the age group of 26-31 yrs .

What qualifications do employees have who know Systemverilog?

5% hold a Graduate degree. 2% hold a PostGraduate degree.

Which schools do employees working who know Systemverilog went to?

20% of employees studied at Indian Institute of Technology . 10% studied at Govt. Boys Higher Secondary School .

Salary Brackets

Percentage
10-20 lakhs	10-20 lakhs Percentage : 34
20-30 lakhs	20-30 lakhs Percentage : 10
30-40 lakhs	30-40 lakhs Percentage : 10
40-50 lakhs	40-50 lakhs Percentage : 20
> 50 lakhs	> 50 lakhs Percentage : 27

Age Brackets

Percentage
21-26 yrs	21-26 yrs Percentage : 34
26-31 yrs	26-31 yrs Percentage : 29
31-36 yrs	31-36 yrs Percentage : 12
36-41 yrs	36-41 yrs Percentage : 7
> 41 yrs	> 41 yrs Percentage : 7

Skills

Trending

systemverilog

100 %

verilog

0 %

c++

0 %

rtl design

0 %

universal verification methodology (uvm)

0 %

functional verification

0 %

Schools

Top

Indian Institute of Technology

20 %

Govt. Boys Higher Secondary School

10 %

Model Engineering College

10 %

Birla Institute of Technology

7 %

Birla Institute of Technology and Science

5 %

DAV Public School

5 %

Government College of Technology

5 %

Systemverilog Salaries

Average salary is ₹39.3lakhs.

Similar Searches

How much do Systemverilog employees make?

What is the average salary of Systemverilog?

What is the highest salary offered who know Systemverilog?

What are the most common skills required who know Systemverilog?

What are the highest paying jobs who know Systemverilog?

Which are the top locations?

What is the median salary offered who know Systemverilog?

How is the age distributed among employees who know Systemverilog?

What qualifications do employees have who know Systemverilog?

Which schools do employees working who know Systemverilog went to?

How much do Systemverilog employees make?

What is the average salary of Systemverilog?

What is the highest salary offered who know Systemverilog?

What are the most common skills required who know Systemverilog?

What are the highest paying jobs who know Systemverilog?

Which are the top locations?

What is the median salary offered who know Systemverilog?

How is the age distributed among employees who know Systemverilog?

What qualifications do employees have who know Systemverilog?

Which schools do employees working who know Systemverilog went to?

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