Company	Title	Experience	Annual Salary	School	Skills
Samsung Electronics Bengaluru	Senior Manager (Technical lead and Manager)	8.9yrs	Base: ₹37.6lakhs Stocks: - Bonus: ₹7.7lakhs CTC:₹45.3lakhs	School of Information Science CMRIT	Chi Axi3/4 Amba Ahb Amba Apb Amba Ace & Ace Lite Functional Verification (Show More) Functional Coverage Universal Verification Methodology (Uvm) System Verilog Verilog Very-large-scale Integration (Vlsi) Electronics Programming Electrical Engineering Linux Microsoft Office Microsoft Word Microsoft Excel Microsoft Powerpoint Cadence Virtuoso Regression Analysis Synopsys Verdi Cadence Simvision Cadence Emanager Synopsys Dve
Intel Corporation Bengaluru	SoC Design verification engineer	6.9yrs	Base: ₹27.7lakhs Stocks: ₹6.3lakhs (Today) (19.0%) ₹7.5L Bonus: ₹1.3lakhs CTC:₹35.3lakhs (Today) (3.4%) ₹36.5L	Anna University Chennai	System Verilog Universal Verification Methodology (Uvm) Verilog Digital Electronics Very-large-scale Integration (Vlsi) Microsoft Office (Show More) Linux Perl Public Speaking Lcp Dft Display Port Serial Protocols Apb Tap Network Stf Network Spyglass Xilinx Ise Verdi Simvision
Intel Bengaluru	Verification Engineer (7) Male	8.2yrs	Base: ₹32.9lakhs Stocks: ₹3.0lakhs (Today) (20.0%) ₹3.6L Bonus: ₹3.0lakhs CTC:₹38.9lakhs (Today) (1.5%) ₹39.5L	Vel tech multitech dr.rangarajan dr.sakunthala engineering college	System Verilog Uvm Usb3.0
Qualcomm Noida	Senior Design Engineer	4.3yrs		Indian Institute of Technology Sardar Patel Vidyalaya	Risc-v Arm Architecture Systemverilog Amba Microarc Lint (Show More) Cache Coherency Spyglass Performance Analysis Coverage Analysis Digital Designs Communication Design Engineering Computer-aided Design (Cad) Electrical Engineering C++ Machine Learning Computer Architecture Android Development Python C Computer Vision System Verilog Matlab Java Verilog Algorithms Computer Science Artificial Intelligence (Ai) Rtl Design Perl Shell Scripting Perl Automation Object Oriented Perl Amba Ahb Csh Synopsys Tools
NXP Semiconductors Noida	Senior Design Engineer	4.2yrs		Indian Institute of Technology Sardar Patel Vidyalaya	Risc-v Arm Architecture Systemverilog Amba Microarc Lint (Show More) Cache Coherency Spyglass Performance Analysis Coverage Analysis Digital Designs Communication Design Engineering Computer-aided Design (Cad) Electrical Engineering C++ Machine Learning Computer Architecture Android Development Python C Computer Vision System Verilog Matlab Java Verilog Algorithms Computer Science Artificial Intelligence (Ai) Rtl Design Perl Shell Scripting Perl Automation Object Oriented Perl Amba Ahb Csh Synopsys Tools
Krutrim Bengaluru	Verification Consultant Male	4.7yrs	Base: ₹15.5lakhs Stocks: - Bonus: - CTC:₹15.5lakhs	Valliammai Engineering College maven silicon	I2c System On A Chip (Soc) Field-programmable Gate Arrays (Fpga) Independent Contributor Functional Verification Object-oriented Programming (Oop) (Show More) Perl System Verilog Universal Verification Methodology (Uvm) Verilog Digital Electronics Application-specific Integrated Circuits (Asic) Pspice Microsoft Powerpoint Microsoft Office Microsoft Word Microsoft Excel Leadership Electronic Circuit Design Creative Problem Solving Amba Ahb Very-large-scale Integration (Vlsi)
Intel Corporation Bengaluru	System - onChip Design Engineer Male	4.9yrs	Base: ₹22.2lakhs Stocks: ₹4.9lakhs (Today) (8.2%) ₹5.3L Bonus: ₹3.0lakhs CTC:₹30.1lakhs (Today) (1.3%) ₹30.5L	Institute of Technology Institute of Technology	Formal Verification Design Verification Test Planning Coverage Closer System Verilog Uvm (Show More) Perl Script
EdgeQ Inc. Bengaluru	Member Of Technical Staff	2.9yrs	Base: ₹20.6lakhs Stocks: ₹1.3lakhs Bonus: - CTC:₹21.9lakhs	Motilal Nehru Institute National Institute of Technology	Verilog C System Verilog Asic Uvm Debugging (Show More) Tcl she Shell Scripting Makefile Risc-v Ethernet
Samsung Semiconductor India Bangluru	Associate staff engineer Male	4.9yrs	Base: ₹23.4lakhs Stocks: - Bonus: ₹3.9lakhs CTC:₹27.3lakhs	BIRLA VISHVAKARMA MAHA VIDHYALAYA(GIA)	Coverage Universal Verification Methodology (Uvm) System Verilog Test Planning Debugging
AMD Bengaluru	Silicon Design Engineer II Female	3.1yrs	Base: ₹17.0lakhs Stocks: ₹4.3lakhs Bonus: ₹1.3lakhs CTC:₹22.6lakhs	Dr. A.P.J. Abdul Kalam Technical University	Object-oriented Programming (Oop) Functional Verification Universal Verification Methodology (Uvm) System Verilog Pss Verilog (Show More) System On A Chip (Soc) Axi C++ X86 Computer Architecture Static Timing Analysis Design Vhdl Electronic Circuit Design Shell Scripting Debugging Verdi Palladium Xcelium

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Frequently asked questions

How much do System Verilog employees make?

Employees who know System Verilog earn an average of ₹29.4lakhs, mostly ranging from ₹19.9lakhs per year to ₹62.0lakhs per year based on 28 profiles. The top 10% of employees earn more than ₹48.4lakhs per year.

What is the average salary of System Verilog?

Average salary of an employee who know System Verilog is ₹29.4lakhs.

What is the highest salary offered who know System Verilog?

Highest reported salary offered who know System Verilog is ₹62.8lakhs. The top 10% of employees earn more than ₹48.4lakhs per year. The top 1% earn more than a whopping ₹62.0lakhs per year.

What are the most common skills required who know System Verilog?

100% of employees have skills in system verilog . 0% also know verilog . 0% also know c .

What are the highest paying jobs who know System Verilog?

The top 5 highest paying jobs who know System Verilog with reported salaries are:

staff engineer - ₹61.0lakhs per year
senior design engineer - ₹48.0lakhs per year
verification engineer - ₹29.0lakhs per year
senior engineer - ₹20.0lakhs per year
silicon design engineer ii - ₹19.0lakhs per year

What is the median salary offered who know System Verilog?

The median salary approximately calculated from salary profiles measured so far is ₹22.0lakhs per year.

How is the age distributed among employees who know System Verilog?

36% of employees lie between 21-26 yrs . 29% of the employees fall in the age group of 26-31 yrs .

What qualifications do employees have who know System Verilog?

11% hold a Graduate degree. 7% hold a PostGraduate degree.

Which schools do employees working who know System Verilog went to?

18% of employees studied at Indian Institute of Technology . 11% studied at Sardar Patel Vidyalaya .

Frequently asked questions

How much do System Verilog employees make?

What is the average salary of System Verilog?

Average salary of an employee who know System Verilog is ₹29.4lakhs.

What is the highest salary offered who know System Verilog?

What are the most common skills required who know System Verilog?

100% of employees have skills in system verilog . 0% also know verilog . 0% also know c .

What are the highest paying jobs who know System Verilog?

The top 5 highest paying jobs who know System Verilog with reported salaries are:

staff engineer - ₹61.0lakhs per year
senior design engineer - ₹48.0lakhs per year
verification engineer - ₹29.0lakhs per year
senior engineer - ₹20.0lakhs per year
silicon design engineer ii - ₹19.0lakhs per year

What is the median salary offered who know System Verilog?

The median salary approximately calculated from salary profiles measured so far is ₹22.0lakhs per year.

How is the age distributed among employees who know System Verilog?

36% of employees lie between 21-26 yrs . 29% of the employees fall in the age group of 26-31 yrs .

What qualifications do employees have who know System Verilog?

11% hold a Graduate degree. 7% hold a PostGraduate degree.

Which schools do employees working who know System Verilog went to?

18% of employees studied at Indian Institute of Technology . 11% studied at Sardar Patel Vidyalaya .

Salary Brackets

Percentage
10-20 lakhs	10-20 lakhs Percentage : 36
20-30 lakhs	20-30 lakhs Percentage : 25
30-40 lakhs	30-40 lakhs Percentage : 14
40-50 lakhs	40-50 lakhs Percentage : 18
> 50 lakhs	> 50 lakhs Percentage : 7

Age Brackets

Percentage
21-26 yrs	21-26 yrs Percentage : 36
26-31 yrs	26-31 yrs Percentage : 29
31-36 yrs	31-36 yrs Percentage : 14
36-41 yrs	36-41 yrs Percentage : 7
> 41 yrs	> 41 yrs Percentage : 7

Skills

Trending

system verilog

100 %

verilog

0 %

uvm

0 %

perl

0 %

c++

0 %

digital electronics

0 %

Schools

Top

Indian Institute of Technology

18 %

Sardar Patel Vidyalaya

11 %

Maven silicon(earlier know as Accel IT Academy)

7 %

School of Information Science

7 %

Anna University Chennai

4 %

BIRLA VISHVAKARMA MAHA VIDHYALAYA(GIA)

4 %

Birla Institute of Technology

4 %

System Verilog Salaries

Average salary is ₹29.4lakhs.

Similar Searches

How much do System Verilog employees make?

What is the average salary of System Verilog?

What is the highest salary offered who know System Verilog?

What are the most common skills required who know System Verilog?

What are the highest paying jobs who know System Verilog?

What is the median salary offered who know System Verilog?

How is the age distributed among employees who know System Verilog?

What qualifications do employees have who know System Verilog?

Which schools do employees working who know System Verilog went to?

How much do System Verilog employees make?

What is the average salary of System Verilog?

What is the highest salary offered who know System Verilog?

What are the most common skills required who know System Verilog?

What are the highest paying jobs who know System Verilog?

What is the median salary offered who know System Verilog?

How is the age distributed among employees who know System Verilog?

What qualifications do employees have who know System Verilog?

Which schools do employees working who know System Verilog went to?

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