Company	Title	Experience	Annual Salary	School	Skills
Sensata Technologies Pvt Ltd. Pune	ASIC Verification Engineer	9yrs	Base: ₹19.9lakhs Stocks: - Bonus: - CTC:₹19.9lakhs	Jawaharlal Nehru Engineering College - Aurangabad	UVM QuestaSim AMBA (AXI, AHB, APB) VHDL Verilog System verilog (Show More) Embedded C Python TCL Git
Synopsys Inc Noida	ASIC Digital Design Engineer	5.3yrs	Base: ₹22.0lakhs Stocks: ₹6.3lakhs (Today) (9.5%) ₹6.9L Bonus: ₹1.9lakhs CTC:₹30.2lakhs (Today) (2.0%) ₹30.8L	Thapar Institute of Engineering and Technology Uttar Pradesh Technical University	Verilog System Verilog AMBA/AXI/APB Synopsys Spyglass Design Compiler Primetime STA (Show More) VCS DVE/Verdi Formality Conformal low power
AMD Hyderabad	Senior silicon design engineer	7.9yrs		Anna University Chennai	System Verilog Universal Verification Methodology (Uvm) Verilog Digital Electronics Very-large-scale Integration (Vlsi) Dft (Show More) Xilinx Ise Spyglass Simvision Display Port
SiMa.ai Bengaluru	Staff Engineer	9.8yrs		OXFORD ENGINEERING COLLEGE OXFORD ENGINEERING COLLEGE	Universal Verification Methodology (Uvm) System Verilog Verilog Application-specific Integrated Circuits (Asic) Very-large-scale Integration (Vlsi) Semiconductors (Show More) Test Planning Code Coverage Coverage Analysis Pcie
VALSOC Semiconductor Pvt Ltd Bengaluru	Senior Design Engineer II	9.6yrs	Base: ₹44.8lakhs Stocks: - Bonus: - CTC:₹44.8lakhs	Gautam Buddha University	Verilog System Verilog Vhdl Uvm Fpga Asic (Show More) Vlsi Functional Verification Microprocessors Programming
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AMD Bengaluru	Silicon Design Engineer II	6.3yrs		Dr. A.P.J. Abdul Kalam Technical University	Object-oriented Programming (Oop) Functional Verification Universal Verification Methodology (Uvm) System Verilog Pss Verilog (Show More) System On A Chip (Soc) Axi C++ X86 Computer Architecture Static Timing Analysis Design Vhdl Electronic Circuit Design Shell Scripting Debugging Verdi Palladium Xcelium
Marvel Technologies Pune	Senior Staff Engineer (t4)	13.3yrs		Sinhgad College of Engineering	System Verilog Verilog OVM SystemVerilog ASIC Open Verification Methodology (Show More) VLSI VHDL AMBA Embedded Systems Semiconductors Xilinx Compilers USB3.0 Functional Verification SoC RTL coding ModelSim Static Timing Analysis AMBA AHB TCL Debugging RTL design FPGA Veritas Cluster Server NCSim USB EDA RTL Design
Intel Bengaluru	Graduate Technical Intern	0.3yrs	Base: ₹14.1lakhs Stocks: - Bonus: - CTC:₹14.1lakhs	National Institute of Technology government engineering college raipur	Digital Electronics Digital Ic Design Verilog Scripting Python Programming Tcl/tk (Show More) Analog Circuit Design Silicon Validation System Verilog Verification Unix Physical Design Formal Verification Dft Low Power Design Asic C Programming Fusion Compiler/icc2 Spyglass Jasper Fpga Teamwork Multitasking
Siemens Eda Noida	Senior Member Of Technical Staff (T06)	2yrs	Base: ₹16.9lakhs Stocks: - Bonus: ₹1.5lakhs CTC:₹18.4lakhs	Malviya National Institute of Technology	C++ C Gdb System Verilog
AMD Hyderabad	Silicon design engineer2	6yrs	Base: ₹23.5lakhs Stocks: ₹10.1lakhs Bonus: ₹3.4lakhs CTC:₹37.0lakhs	Krishna chaitanya Institute of Technology & Sciences	Workload Prioritization Task Management Agile Methodologies Code Coverage Microsoft Excel Microsoft Powerpoint (Show More) Jira Functional Verification Risc-v Universal Verification Methodology (Uvm) System Verilog Verilog Very-large-scale Integration (Vlsi) C Microsoft Office Matlab Vhdl Cmos Systemverilog

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Frequently asked questions

How much do System Verilog employees make?

Employees who know System Verilog earn an average of ₹36.4lakhs, mostly ranging from ₹21.2lakhs per year to ₹94.1lakhs per year based on 47 profiles. The top 10% of employees earn more than ₹59.2lakhs per year.

What is the average salary of System Verilog?

Average salary of an employee who know System Verilog is ₹36.4lakhs.

What is the highest salary offered who know System Verilog?

Highest reported salary offered who know System Verilog is ₹103.8lakhs. The top 10% of employees earn more than ₹59.2lakhs per year. The top 1% earn more than a whopping ₹94.1lakhs per year.

What are the most common skills required who know System Verilog?

100% of employees have skills in system verilog . 0% also know verilog . 0% also know c .

What are the highest paying jobs who know System Verilog?

The top 5 highest paying jobs who know System Verilog with reported salaries are:

senior member of technical staff - ₹61.0lakhs per year
staff engineer - ₹51.0lakhs per year
senior silicon design engineer - ₹47.0lakhs per year
ip design verification engineer - ₹40.0lakhs per year
verification engineer - ₹29.0lakhs per year

Which are the top locations?

Bangalore

What is the median salary offered who know System Verilog?

The median salary approximately calculated from salary profiles measured so far is ₹35.0lakhs per year.

How is the age distributed among employees who know System Verilog?

34% of employees lie between 26-31 yrs . 26% of the employees fall in the age group of 21-26 yrs .

What qualifications do employees have who know System Verilog?

15% hold a PostGraduate degree. 8% hold a Graduate degree.

Which schools do employees working who know System Verilog went to?

11% of employees studied at Indian Institute of Technology . 9% studied at Anna University Chennai .

Frequently asked questions

How much do System Verilog employees make?

What is the average salary of System Verilog?

Average salary of an employee who know System Verilog is ₹36.4lakhs.

What is the highest salary offered who know System Verilog?

What are the most common skills required who know System Verilog?

100% of employees have skills in system verilog . 0% also know verilog . 0% also know c .

What are the highest paying jobs who know System Verilog?

The top 5 highest paying jobs who know System Verilog with reported salaries are:

senior member of technical staff - ₹61.0lakhs per year
staff engineer - ₹51.0lakhs per year
senior silicon design engineer - ₹47.0lakhs per year
ip design verification engineer - ₹40.0lakhs per year
verification engineer - ₹29.0lakhs per year

Which are the top locations?

Bangalore

What is the median salary offered who know System Verilog?

The median salary approximately calculated from salary profiles measured so far is ₹35.0lakhs per year.

How is the age distributed among employees who know System Verilog?

34% of employees lie between 26-31 yrs . 26% of the employees fall in the age group of 21-26 yrs .

What qualifications do employees have who know System Verilog?

15% hold a PostGraduate degree. 8% hold a Graduate degree.

Which schools do employees working who know System Verilog went to?

11% of employees studied at Indian Institute of Technology . 9% studied at Anna University Chennai .

Salary Brackets

10-20 lakhs30%
20-30 lakhs15%
30-40 lakhs15%
40-50 lakhs21%
> 50 lakhs19%

Age Brackets

21-26 yrs28%
26-31 yrs37%
31-36 yrs25%
36-41 yrs6%
> 41 yrs4%

System Verilog Salaries

Average salary is ₹36.4lakhs.

Similar Searches

How much do System Verilog employees make?

What is the average salary of System Verilog?

What is the highest salary offered who know System Verilog?

What are the most common skills required who know System Verilog?

What are the highest paying jobs who know System Verilog?

Which are the top locations?

What is the median salary offered who know System Verilog?

How is the age distributed among employees who know System Verilog?

What qualifications do employees have who know System Verilog?

Which schools do employees working who know System Verilog went to?

How much do System Verilog employees make?

What is the average salary of System Verilog?

What is the highest salary offered who know System Verilog?

What are the most common skills required who know System Verilog?

What are the highest paying jobs who know System Verilog?

Which are the top locations?

What is the median salary offered who know System Verilog?

How is the age distributed among employees who know System Verilog?

What qualifications do employees have who know System Verilog?

Which schools do employees working who know System Verilog went to?

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