Company	Title	Experience	Annual Salary	School	Skills
Texas Instruments Bengaluru	Analog Design Engineer (24)	1.7yrs	Base: ₹20.4lakhs Stocks: ₹2.0lakhs Bonus: ₹4.1lakhs CTC:₹26.5lakhs	Indian Institute of Technology Kharagpur	Design Engineering Mixed-signal Ic Design Integrated Circuits (Ic) Power Management Hardware Design Layout Design (Show More) Schematic Layout Versus Schematic (Lvs) Electronic Engineering Design Rule Checking (Drc) Problem Solving Electrical Engineering Communication Circuits Analog Circuit Design Analog Cadence Virtuoso Verilog Analog Signal Processing Analog Integrated Circuit Design Mixed-signal Integrated Circuits Digital Ic Design Static Timing Analysis Python
Ampere Pune	Physical Design Engineer	6.6yrs	Base: ₹27.5lakhs Stocks: ₹7.6lakhs Bonus: ₹3.8lakhs CTC:₹38.9lakhs	G.H. Raisoni College of Engineering(GHRCE) Nagpur University	Layout Versus Schematic (Lvs) Design Rule Checking (Drc) Physical Design Asic Vlsi Scripting (Show More) Debugging System On A Chip (Soc) Linux Perl Verilog Mentoring Static Timing Analysis Tcl Timing Closure Place & Route Floorplanning Clock Tree Synthesis Physical Verification Time Management
Texas Instruments Bengaluru	Digital Design Engineer	4.1yrs	Base: ₹28.5lakhs Stocks: - Bonus: ₹4.4lakhs CTC:₹32.9lakhs	Government College of Technology Kongu Polytechnic College	Power Analysis Area Optimization Voltus Microarchitecture Tcsh Universal Verification Methodology (Uvm) (Show More) Test Planning Assertion Based Verification Field-programmable Gate Arrays (Fpga) Simvision Tempus Cadence Virtuoso Physical Design Innovus Genus Conformal Jasper Gold Python Xcelium Vim Bash Digital Circuit Design Rtl Design Conformal Lec Computer Hardware Troubleshooting Verilog Hdl Perl Git Linux Centos Windows Computer Hardware C Microsoft Word Microsoft Excel Microsoft Powerpoint Systemverilog Upf Tcl Modelsim Circuit Analysis Computer Hardware Assembly Computer Hardware Installation Rtl Coding Logic Synthesis Cdc Lint Static Timing Analysis Low-power Design Application-specific Integrated Circuits (Asic) Computer Architecture System On A Chip (Soc) Finite State Machines Rtl-to-gdsii Flow Formal Verification
Intel Corporation Bengaluru	SoC Architect Male	8yrs		The University of Texas at Austin Delhi Technological University (Formerly DCE)	X86 System On A Chip (Soc) Interconnect Manageability System Architecture Ucie (Show More) Pcie Hardware Design Cache Coherency Operating Systems Python Machine Learning Axi Amba Ahb Apb Logic Synthesis Physical Design Dft Rtl Design Cdc Verilog Systemverilog Rdc Lint Arm Cortex-m Arm Architecture Functional Safety Iso 26262 Advanced Driver-assistance Systems (Adas) Requirements Traceability Microarchitecture Vlsi Cmos Vhdl Static Timing Analysis Embedded Systems C Robotics Matlab Image Processing Html 5 Css3 Javascript Html C++
Synopsys Inc Bhubaneswar	Technical Engineer - Physical Design	1.9yrs	Base: ₹7.7lakhs Stocks: ₹1.9lakhs Bonus: ₹1.0lakhs CTC:₹10.6lakhs	Jaypee University of Engineering and Technology Mahatma Hansraj Modern School (MHMS)	Arduino Matlab Field-programmable Gate Arrays (Fpga) Fpga Layout Versus Schematic (Lvs) Analog Circuit Design (Show More) Computer Numerical Control (Cnc) Cmos Tcl Machine Learning Business Management Augmented Reality (Ar) Kotlin Mobile Applications Mobile Application Development Node.js Web Applications Heroku Web Development Django Python Digital Marketing Cloud Applications Cloud Vlsi Innovus Cadence Software Application-specific Integrated Circuits (Asic) Synopsys Primetime Amazon Ec2 Amazon S3 Cloud Storage Cloud Computing Iaas Image Processing Digital Image Processing Cloud Computing Amazon Web Services (Aws) Physical Design Synopsys Ic Compiler Static Timing Analysis Linux Perl Ltspice Glade C Cadence Virtuoso Very-large-scale Integration (Vlsi) Vhdl Arduino Ide Digital Electronics Integrated Circuits (Ic) Public Speaking C++ Team Leadership Microsoft Office Presentation Skills Unity Leadership
Salesforce Bengaluru	Lead Member Of Technical Staff	13.1yrs	Base: ₹82.9lakhs Stocks: ₹39.8lakhs Bonus: ₹12.8lakhs CTC:₹135.5lakhs	Nanyang Technological University Singapore Indian Institute of Technology (Indian School of Mines)	Algorithms Programming C Computer Science Distributed Systems Data Structures (Show More) Digital Signal Processors Matlab C++ Unix Mysql Docker Java Nosql Angularjs2 Amazon Web Services (Aws) Simulink Spring Framework Terraform Javaserver Pages (Jsp) Digital Signal Processing Ti Dsps Amazon Dynamodb Static Timing Analysis Redis Eda Couchbase Rabbitmq Kubernetes Apache Kafka Golang
Texas Instruments Bengaluru	Digital Design Engineer (26)	3.8yrs	Base: ₹28.5lakhs Stocks: - Bonus: ₹4.4lakhs CTC:₹32.9lakhs	Government College of Technology Kongu Polytechnic College	Area Optimization Voltus Microarchitecture Tcsh Universal Verification Methodology (Uvm) Test Planning (Show More) Assertion Based Verification Field-programmable Gate Arrays (Fpga) Simvision Tempus Cadence Virtuoso Physical Design Innovus Genus Conformal Jasper Gold Python Xcelium Vim Bash Digital Circuit Design Rtl Design Conformal Lec Computer Hardware Troubleshooting Verilog Hdl Perl Git Linux Centos Windows Computer Hardware C Microsoft Word Microsoft Excel Microsoft Powerpoint Systemverilog Upf Tcl Modelsim Circuit Analysis Computer Hardware Assembly Computer Hardware Installation Rtl Coding Logic Synthesis Cdc Lint Static Timing Analysis Low-power Design Application-specific Integrated Circuits (Asic) Computer Architecture System On A Chip (Soc) Finite State Machines Rtl-to-gdsii Flow Formal Verification
Texas Instruments Bengaluru	Digital Design Engineer	3.7yrs	Base: ₹28.5lakhs Stocks: - Bonus: ₹4.4lakhs CTC:₹32.9lakhs	Government College of Technology Kongu Polytechnic College	Area Optimization Voltus Microarchitecture Tcsh Universal Verification Methodology (Uvm) Test Planning (Show More) Assertion Based Verification Field-programmable Gate Arrays (Fpga) Simvision Tempus Cadence Virtuoso Physical Design Innovus Genus Conformal Jasper Gold Python Xcelium Vim Bash Digital Circuit Design Rtl Design Conformal Lec Computer Hardware Troubleshooting Verilog Hdl Perl Git Linux Centos Windows Computer Hardware C Microsoft Word Microsoft Excel Microsoft Powerpoint Systemverilog Upf Tcl Modelsim Circuit Analysis Computer Hardware Assembly Computer Hardware Installation Rtl Coding Logic Synthesis Cdc Lint Static Timing Analysis Low-power Design Application-specific Integrated Circuits (Asic) Computer Architecture System On A Chip (Soc) Finite State Machines Rtl-to-gdsii Flow Formal Verification
Qualcomm Bengaluru	Senior Lead Engineer Male	11yrs		Birla Institute of Technology and Science NITTE MEENAKSHI INSTITUTE OF TECHNOLOGY	VLSI CMOS Circuit Design GPIO Cadence Virtuoso SPICE (Show More) Spectre Verilog ASIC Logic Design Characterization Hspice Finesim Xa Embedded Systems Matlab Perl Very-Large-Scale Integration (VLSI) Analog Design Static Timing Analysis Shell
Wipro Technologies Bangalore	Physical Design Engineer (2) Male	3.9yrs	Base: ₹11.8lakhs Stocks: - Bonus: - CTC:₹11.8lakhs	Visvesvaraya Technological University	Static Timing Analysis Physical Design

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Frequently asked questions

How much do Static Timing Analysis employees make?

Employees who know Static Timing Analysis earn an average of ₹35.2lakhs, mostly ranging from ₹16.6lakhs per year to ₹135.5lakhs per year based on 35 profiles. The top 10% of employees earn more than ₹64.3lakhs per year.

What is the average salary of Static Timing Analysis?

Average salary of an employee who know Static Timing Analysis is ₹35.2lakhs.

What is the highest salary offered who know Static Timing Analysis?

Highest reported salary offered who know Static Timing Analysis is ₹135.5lakhs. The top 10% of employees earn more than ₹64.3lakhs per year. The top 1% earn more than a whopping ₹135.5lakhs per year.

What are the most common skills required who know Static Timing Analysis?

100% of employees have skills in static timing analysis . 0% also know verilog . 0% also know perl .

What are the highest paying jobs who know Static Timing Analysis?

The top 5 highest paying jobs who know Static Timing Analysis with reported salaries are:

lead member of technical staff - ₹136.0lakhs per year
staff engineer - ₹86.0lakhs per year
digital design engineer - ₹33.0lakhs per year
physical design engineer - ₹22.0lakhs per year
senior engineer - ₹20.0lakhs per year

Which are the top locations?

Bangalore

What is the median salary offered who know Static Timing Analysis?

The median salary approximately calculated from salary profiles measured so far is ₹22.6lakhs per year.

How is the age distributed among employees who know Static Timing Analysis?

34% of employees lie between 26-31 yrs . 34% of the employees fall in the age group of 31-36 yrs .

What qualifications do employees have who know Static Timing Analysis?

23% hold a PostGraduate degree. 11% hold a Graduate degree.

Which schools do employees working who know Static Timing Analysis went to?

9% of employees studied at Government College of Technology . 9% studied at Indian Institute of Technology .

Frequently asked questions

How much do Static Timing Analysis employees make?

What is the average salary of Static Timing Analysis?

Average salary of an employee who know Static Timing Analysis is ₹35.2lakhs.

What is the highest salary offered who know Static Timing Analysis?

What are the most common skills required who know Static Timing Analysis?

100% of employees have skills in static timing analysis . 0% also know verilog . 0% also know perl .

What are the highest paying jobs who know Static Timing Analysis?

The top 5 highest paying jobs who know Static Timing Analysis with reported salaries are:

lead member of technical staff - ₹136.0lakhs per year
staff engineer - ₹86.0lakhs per year
digital design engineer - ₹33.0lakhs per year
physical design engineer - ₹22.0lakhs per year
senior engineer - ₹20.0lakhs per year

Which are the top locations?

Bangalore

What is the median salary offered who know Static Timing Analysis?

The median salary approximately calculated from salary profiles measured so far is ₹22.6lakhs per year.

How is the age distributed among employees who know Static Timing Analysis?

34% of employees lie between 26-31 yrs . 34% of the employees fall in the age group of 31-36 yrs .

What qualifications do employees have who know Static Timing Analysis?

23% hold a PostGraduate degree. 11% hold a Graduate degree.

Which schools do employees working who know Static Timing Analysis went to?

9% of employees studied at Government College of Technology . 9% studied at Indian Institute of Technology .

Salary Brackets

Percentage
10-20 lakhs	10-20 lakhs Percentage : 43
20-30 lakhs	20-30 lakhs Percentage : 20
30-40 lakhs	30-40 lakhs Percentage : 14
40-50 lakhs	40-50 lakhs Percentage : 3
> 50 lakhs	> 50 lakhs Percentage : 20

Age Brackets

Percentage
21-26 yrs	21-26 yrs Percentage : 20
26-31 yrs	26-31 yrs Percentage : 34
31-36 yrs	31-36 yrs Percentage : 34
36-41 yrs	36-41 yrs Percentage : 9
> 41 yrs	> 41 yrs Percentage : 3

Skills

Trending

static timing analysis

100 %

verilog

0 %

perl

0 %

c++

0 %

physical design

0 %

tcl

0 %

Schools

Top

Government College of Technology

9 %

Indian Institute of Technology

9 %

Indian Institute of Technology (IIT)

9 %

Kongu Polytechnic College

9 %

Birla Institute of Technology and Science

6 %

Birla Institute of Technology and Science (BITS)

6 %

Indian Institute of Technology (Indian School of Mines)

6 %

Static Timing Analysis Salaries

Average salary is ₹35.2lakhs.

Similar Searches

How much do Static Timing Analysis employees make?

What is the average salary of Static Timing Analysis?

What is the highest salary offered who know Static Timing Analysis?

What are the most common skills required who know Static Timing Analysis?

What are the highest paying jobs who know Static Timing Analysis?

Which are the top locations?

What is the median salary offered who know Static Timing Analysis?

How is the age distributed among employees who know Static Timing Analysis?

What qualifications do employees have who know Static Timing Analysis?

Which schools do employees working who know Static Timing Analysis went to?

How much do Static Timing Analysis employees make?

What is the average salary of Static Timing Analysis?

What is the highest salary offered who know Static Timing Analysis?

What are the most common skills required who know Static Timing Analysis?

What are the highest paying jobs who know Static Timing Analysis?

Which are the top locations?

What is the median salary offered who know Static Timing Analysis?

How is the age distributed among employees who know Static Timing Analysis?

What qualifications do employees have who know Static Timing Analysis?

Which schools do employees working who know Static Timing Analysis went to?

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