Salary Profiles
Company
Title
Experience
Annual Salary
School
Skills
Cisco
Bengaluru
6.1yrs

Base: ₹26.1lakhs

Stocks: ₹9.6lakhs

(Today) (5.2%) ₹10.1L

Bonus: ₹2.0lakhs

CTC:₹37.7lakhs

(Today) (1.3%) ₹38.2L

2.6yrs

Base: ₹19.3lakhs

Stocks: -

Bonus: -

CTC:₹19.3lakhs

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Frequently asked questions
How much do Digital Logic Design employees make?

Employees who know Digital Logic Design earn an average of ₹28.5lakhs, mostly ranging from ₹25.7lakhs per year to ₹37.5lakhs per year based on 2 profiles. The top 10% of employees earn more than ₹35.7lakhs per year.

What is the average salary of Digital Logic Design?

Average salary of an employee who know Digital Logic Design is ₹28.5lakhs.

What is the median salary offered who know Digital Logic Design?

The median salary approximately calculated from salary profiles measured so far is ₹28.5lakhs per year.

How is the age distributed among employees who know Digital Logic Design?

This group has a predominantly younger workforce. 50% of employees lie between 26-31 yrs .

Frequently asked questions
How much do Digital Logic Design employees make?

Employees who know Digital Logic Design earn an average of ₹28.5lakhs, mostly ranging from ₹25.7lakhs per year to ₹37.5lakhs per year based on 2 profiles. The top 10% of employees earn more than ₹35.7lakhs per year.

What is the average salary of Digital Logic Design?

Average salary of an employee who know Digital Logic Design is ₹28.5lakhs.

What is the median salary offered who know Digital Logic Design?

The median salary approximately calculated from salary profiles measured so far is ₹28.5lakhs per year.

How is the age distributed among employees who know Digital Logic Design?

This group has a predominantly younger workforce. 50% of employees lie between 26-31 yrs .

Salary Brackets
Percentage
10-20 lakhs 10-20 lakhs
Percentage : 50
30-40 lakhs 30-40 lakhs
Percentage : 50
Age Brackets
Percentage
26-31 yrs 26-31 yrs
Percentage : 50
Skills
Trending
digital logic design
100 %
i2c
0 %
microarchitecture
0 %
rtl design
0 %
verilog
0 %
xilinx vivado
0 %
amba
0 %
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