Company	Title	Experience	Annual Salary	School	Skills
AMD Hyderabad	Senior silicon design engineer	7.9yrs			System Verilog Universal Verification Methodology (Uvm) Verilog Digital Electronics Very-large-scale Integration (Vlsi) Dft (Show More) Xilinx Ise Spyglass Simvision Display Port
Texas Instruments Bengaluru	Digital Design Engineer (26)	4.9yrs		Government College of Technology Kongu Polytechnic College	Rdc Xilinx Vivado Fpga Prototyping Technical Documentation Technical Drawing Rtl Verification (Show More) Universal Asynchronous Receiver/transmitter (Uart) Spi Power Analysis Area Optimization Voltus Microarchitecture Tcsh Universal Verification Methodology (Uvm) Test Planning Assertion Based Verification Field-programmable Gate Arrays (Fpga) Simvision Tempus Cadence Virtuoso
Intel Corporation Bengaluru	SoC Design verification engineer	6.9yrs	Base: ₹27.7lakhs Stocks: ₹6.3lakhs (Today) (128.6%) ₹14.4L Bonus: ₹1.3lakhs CTC:₹35.3lakhs (Today) (22.9%) ₹43.4L	Anna University Chennai	System Verilog Universal Verification Methodology (Uvm) Verilog Digital Electronics Very-large-scale Integration (Vlsi) Microsoft Office (Show More) Linux Perl Public Speaking Lcp Dft Display Port Serial Protocols Apb Tap Network Stf Network Spyglass Xilinx Ise Verdi Simvision
Texas Instruments Bengaluru	Digital Design Engineer	4.6yrs	Base: ₹28.5lakhs Stocks: - Bonus: ₹4.4lakhs CTC:₹32.9lakhs	Government College of Technology Kongu Polytechnic College	Rdc Xilinx Vivado Fpga Prototyping Technical Documentation Technical Drawing Rtl Verification (Show More) Universal Asynchronous Receiver/transmitter (Uart) Spi Power Analysis Area Optimization Voltus Microarchitecture Tcsh Universal Verification Methodology (Uvm) Test Planning Assertion Based Verification Field-programmable Gate Arrays (Fpga) Simvision Tempus Cadence Virtuoso
Waferspace Semiconductor Bengaluru	Design Engineer II	5.5yrs	Base: ₹20.2lakhs Stocks: - Bonus: - CTC:₹20.2lakhs	Visvesvaraya Technological University Sri Chaitanya junior college Vijayawada	Organization Skills Oral Communication Scan Insertion Design Rule Checking (Drc) Mentor Graphics Dft (Show More) Automatic Test Pattern Generation (Atpg) Gls Very-large-scale Integration (Vlsi) Research Microsoft Office C Matlab Microsoft Word Microsoft Powerpoint Verilog Management Leadership Teamwork Cadence Mentor Simvision Genus Modus Tessent
🚀 AI Agents that work 24/7 to land you higher paying jobs
Texas Instruments Bengaluru	Digital Design Engineer (26)	3.8yrs	Base: ₹28.5lakhs Stocks: - Bonus: ₹4.4lakhs CTC:₹32.9lakhs	Government College of Technology Kongu Polytechnic College	Area Optimization Voltus Microarchitecture Tcsh Universal Verification Methodology (Uvm) Test Planning (Show More) Assertion Based Verification Field-programmable Gate Arrays (Fpga) Simvision Tempus Cadence Virtuoso Physical Design Innovus Genus Conformal Jasper Gold Python Xcelium Vim Bash Digital Circuit Design Rtl Design Conformal Lec Computer Hardware Troubleshooting Verilog Hdl Perl Git Linux Centos Windows Computer Hardware C Microsoft Word Microsoft Excel Microsoft Powerpoint Systemverilog Upf Tcl Modelsim Circuit Analysis Computer Hardware Assembly Computer Hardware Installation Rtl Coding Logic Synthesis Cdc Lint Static Timing Analysis Low-power Design Application-specific Integrated Circuits (Asic) Computer Architecture System On A Chip (Soc) Finite State Machines Rtl-to-gdsii Flow Formal Verification
Texas Instruments Bengaluru	Digital Design Engineer	3.7yrs	Base: ₹28.5lakhs Stocks: - Bonus: ₹4.4lakhs CTC:₹32.9lakhs	Government College of Technology Kongu Polytechnic College	Area Optimization Voltus Microarchitecture Tcsh Universal Verification Methodology (Uvm) Test Planning (Show More) Assertion Based Verification Field-programmable Gate Arrays (Fpga) Simvision Tempus Cadence Virtuoso Physical Design Innovus Genus Conformal Jasper Gold Python Xcelium Vim Bash Digital Circuit Design Rtl Design Conformal Lec Computer Hardware Troubleshooting Verilog Hdl Perl Git Linux Centos Windows Computer Hardware C Microsoft Word Microsoft Excel Microsoft Powerpoint Systemverilog Upf Tcl Modelsim Circuit Analysis Computer Hardware Assembly Computer Hardware Installation Rtl Coding Logic Synthesis Cdc Lint Static Timing Analysis Low-power Design Application-specific Integrated Circuits (Asic) Computer Architecture System On A Chip (Soc) Finite State Machines Rtl-to-gdsii Flow Formal Verification
AMD	Senior silicon design engineer	7.9yrs			System Verilog Universal Verification Methodology (Uvm) Verilog Digital Electronics Very-large-scale Integration (Vlsi) Dft (Show More) Spyglass Xilinx Ise Verdi Simvision

100% real time & verified!

Upgrade to view elite profiles

Okay, I'm in!Upgrade

Frequently asked questions

How much do Simvision employees make?

Employees who know Simvision earn an average of ₹36.9lakhs, mostly ranging from ₹32.9lakhs per year to ₹47.5lakhs per year based on 8 profiles. The top 10% of employees earn more than ₹46.8lakhs per year.

What is the average salary of Simvision?

Average salary of an employee who know Simvision is ₹36.9lakhs.

What is the median salary offered who know Simvision?

The median salary approximately calculated from salary profiles measured so far is ₹34.1lakhs per year.

How is the age distributed among employees who know Simvision?

This group has a predominantly younger workforce. 75% of employees lie between 26-31 yrs . 25% of the employees fall in the age group of 21-26 yrs .

Frequently asked questions

How much do Simvision employees make?

What is the average salary of Simvision?

Average salary of an employee who know Simvision is ₹36.9lakhs.

What is the median salary offered who know Simvision?

The median salary approximately calculated from salary profiles measured so far is ₹34.1lakhs per year.

How is the age distributed among employees who know Simvision?

This group has a predominantly younger workforce. 75% of employees lie between 26-31 yrs . 25% of the employees fall in the age group of 21-26 yrs .

Salary Brackets

Percentage
20-30 lakhs	20-30 lakhs Percentage : 13
30-40 lakhs	30-40 lakhs Percentage : 50
40-50 lakhs	40-50 lakhs Percentage : 38

Age Brackets

Percentage
21-26 yrs	21-26 yrs Percentage : 25
26-31 yrs	26-31 yrs Percentage : 75

Skills

Trending

simvision

100 %

universal verification methodology (uvm)

0 %

area optimization

0 %

assertion based verification

0 %

cadence virtuoso

0 %

dft

0 %

field programmable gate arrays (fpga)

0 %

Simvision Salaries

Average salary is ₹36.9lakhs.

Similar Searches

How much do Simvision employees make?

What is the average salary of Simvision?

What is the median salary offered who know Simvision?

How is the age distributed among employees who know Simvision?

How much do Simvision employees make?

What is the average salary of Simvision?

What is the median salary offered who know Simvision?

How is the age distributed among employees who know Simvision?

Browse by Companies

Microsoft

Amazon

Google

Flipkart

Uber

Cisco Systems

NVIDIA

Oracle

Qualcomm

VMware

Browse by Titles

Software Engineer

Business Analyst

Product Manager

Engineering Manager

Data Scientist

UX Designer

Program Manager

Account Manager

Devops Engineer

Machine Learning Engineer

Browse by Skills

Java

JavaScript

Python

MySQL

Algorithms

AWS

Browse by Locations