Lead Asic Design Verification Engineer Salaries
1 verified profilesEmployees as Lead Asic Design Verification Engineer earn an average base salary of $152k, mostly ranging from $152k to $152k based on 1 profiles.
Base: $152k Stocks: - Bonus: - | 16yrs | Bachelor's in electrical and computer engineering | Works in San Jose, CA Lives in worcester (01604-1128) |
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How much do Lead Asic Design Verification Engineer employees make?
Employees as Lead Asic Design Verification Engineer earn an average of $152k, mostly ranging from $152k per year to $152k per year based on 1 profiles. The top 10% of employees earn more than $152k per year.
What is the average salary of Lead Asic Design Verification Engineer?
Average salary of an employee as Lead Asic Design Verification Engineer is $152k.
What is the median salary offered as Lead Asic Design Verification Engineer?
The median salary approximately calculated from salary profiles measured so far is $152k per year.
How is the age distributed among employees as Lead Asic Design Verification Engineer?
This group has a lot of experience. 100% of employees lie between 36-41 yrs .
How much do Lead Asic Design Verification Engineer employees make?
Employees as Lead Asic Design Verification Engineer earn an average of $152k, mostly ranging from $152k per year to $152k per year based on 1 profiles. The top 10% of employees earn more than $152k per year.
What is the average salary of Lead Asic Design Verification Engineer?
Average salary of an employee as Lead Asic Design Verification Engineer is $152k.
What is the median salary offered as Lead Asic Design Verification Engineer?
The median salary approximately calculated from salary profiles measured so far is $152k per year.
How is the age distributed among employees as Lead Asic Design Verification Engineer?
This group has a lot of experience. 100% of employees lie between 36-41 yrs .
| 150-175 k | 150-175 k Percentage : 100 |
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| 36-41 yrs | 36-41 yrs Percentage : 100 |
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