Company	Title	Experience	Annual Salary	School	Skills
Cisco Bengaluru	ASIC Engineer	6.1yrs	Base: ₹26.1lakhs Stocks: ₹9.6lakhs (Today) (2.1%) ₹9.8L Bonus: ₹2.0lakhs CTC:₹37.7lakhs (Today) (0.5%) ₹37.9L	National Institute of Technology Durgapur	Digital Designs Verilog Application-specific Integrated Circuits (Asic) Rtl Design Microarchitecture Serial Protocols (Show More) Universal Asynchronous Receiver/transmitter (Uart) I2c Rtl Coding Amba Ahb Dft Amba Joint Test Action Group (Jtag) Lint Cdc Digital Logic Design Field-programmable Gate Arrays (Fpga) Xilinx Vivado Vhdl Static Timing Analysis
Intel Corporation Bengaluru	Security Software Development Engineer (Technical Lead)	8yrs		Birla Institute of Technology And Science (BITS) SRM IST Chennai	Make Large Language Models (Llm) Kubernetes Performance Benchmarking Linux Kernel Application Security Architecture (Show More) Security Architecture Design Machine Learning Security Software Development Verilog Xilinx Vivado Vhdl Systemc Hardware Software Codesign Artificial Intelligence (Ai) Advanced Statistics Software Architecture Database Management System (Dbms) Network Programming Data Storage Technologies Quadcopter Labview Printed Circuit Board (Pcb) Design Myrio C Digital Logic Electronics Sensors Openai Flask Prompt Engineering C++ Distributed Systems Communication Problem Solving Test Planning Debugging System Validation Firmware Field-programmable Gate Arrays (Fpga) Object-oriented Programming (Oop) Documentation Software Development Scripting Continuous Integration Pytest Shell Scripting Sql Test Automation Test Automation Framework Scikit-learn Pytorch Synthetic Data Generation Matplotlib Intel Edge Ai Image Processing Ai Inference Data Structures And Algorithms Unit Testing Cloud Computing Docker Api Deve
Centre for Development of Telematics (C-DOT) Bengaluru	Digital Design Engineer (Scientist B)	1.9yrs	Base: ₹10.1lakhs Stocks: - Bonus: - CTC:₹10.1lakhs	Indian Institute of Technology Hyderabad (IIT-H) Institute of Engineering & Technology DAVV	System On A Chip (Soc) Modelsim Lattice Diamond Software Cadence Schematic Capture Analog Layout Keysight Ads (Show More) Oops Hyperlynx Power Hyperlynx Signal Integrity Cadence Pcb Designer C++ C Assertions Based Verification Systemverilog Cadence Allegro Verilog Cadence Virtuoso Xilinx Vivado Comsol Ltspice Asitic Clewin Constraints Rtl Design CDC Synchonizers Static Timing Analysis I2C SPI Uart FIFO CORDIC
Texas Instruments Bengaluru	Digital Design Engineer (26)	4.5yrs	Base: ₹35.6lakhs Stocks: ₹4.6lakhs (Today) (10.9%) ₹5.1L Bonus: ₹5.4lakhs CTC:₹45.6lakhs (Today) (1.1%) ₹46.1L	Government College of Technology Kongu Polytechnic College	Rdc Xilinx Vivado Fpga Prototyping Technical Documentation Technical Drawing Rtl Verification (Show More) Universal Asynchronous Receiver/transmitter (Uart) Spi Power Analysis Area Optimization Voltus Microarchitecture Tcsh Universal Verification Methodology (Uvm) Test Planning Assertion Based Verification Field-programmable Gate Arrays (Fpga) Simvision Tempus Cadence Virtuoso
Texas Instruments Bengaluru	Digital Design Engineer	4.6yrs	Base: ₹28.5lakhs Stocks: - Bonus: ₹4.4lakhs CTC:₹32.9lakhs	Government College of Technology Kongu Polytechnic College	Rdc Xilinx Vivado Fpga Prototyping Technical Documentation Technical Drawing Rtl Verification (Show More) Universal Asynchronous Receiver/transmitter (Uart) Spi Power Analysis Area Optimization Voltus Microarchitecture Tcsh Universal Verification Methodology (Uvm) Test Planning Assertion Based Verification Field-programmable Gate Arrays (Fpga) Simvision Tempus Cadence Virtuoso
Unravel Data Hyderabad	Software Engineer	3.7yrs	Base: ₹21.9lakhs Stocks: - Bonus: ₹2.0lakhs CTC:₹23.9lakhs	Anurag Group of Institutions	Xilinx Vivado Software Development Engineering Git Algorithm Development Python (Show More) Java Object-oriented Programming (Oop) Big Data Analytics Extract, Transform, Load (Etl) Process Scheduler Data Analysis Pandas Elasticsearch Dash Data Manipulation Microsoft Visual Studio Code Convolutional Neural Networks (Cnn) Deep Learning Numpy Opensearch Data Visualization Problem Solving Computer Science Ann Very-large-scale Integration (Vlsi) Datasets Embedded C User Requirements Azure Databricks Uipath Github Amazon S3 Data Engineering Amazon Ec2 Amazon Elastic Mapreduce (Emr) Linux Django Mathematics C Html Matlab Mysql Cascading Style Sheets (Css) Verilog Javascript Figma User Interface Design
AMETEK Bengaluru	Technical Lead - Research and Development	11.8yrs	Base: ₹30.3lakhs Stocks: - Bonus: ₹0.8lakhs CTC:₹31.1lakhs	Visvesvaraya Technological University Christ University	Product Design Electronic Circuits Cross-functional Team Leadership Interpersonal Skills Communication Leadership (Show More) Marketing Organization Theory And Behavior Management Accounting Business Law, Ethics And Social Responsibility Managing In The Global Economy Bsp Electronic Instrumentation Lxi Pxi Military Avionics Microblaze Arm Architecture Power Pc Bash Prep Rational Doors Eclipse Jama Python Xilinx Ise Xilinx Vivado Ubuntu Embedded Linux Vxworks Iar Embedded Workbench Assembly Language Mqx 8051 Microcontroller Microchip Pic Msp430 Arduino Lpc2148 Operating Systems C Embedded Software Microcontrollers C++ Electronics Embedded C Embedded Systems Linux Device Drivers Rtos Robotics Electrical Engineering Firmware Matlab Microsoft Office Real-time Operating Systems (Rtos) Sql Testing Management Linux System Administration Linux Kernel
CSIR-CEERI Pilani	Research Intern Male	1.4yrs	Base: ₹14.8lakhs Stocks: ₹2.7lakhs Bonus: ₹1.4lakhs CTC:₹18.9lakhs	Birla Institute of Technology and Science	Reconfigurable Computing Machine Learning Deep Learning Generative Ai Data Science Scikit-learn (Show More) Matlab Cadence Virtuoso X86 Assembly Analog Circuits Xilinx Vivado Verilog Digital Designs Python Pandas Numpy
Cadence Design Systems Bengaluru	Design Engineer II Male	3.4yrs	Base: ₹17.6lakhs Stocks: - Bonus: ₹2.6lakhs CTC:₹20.2lakhs		Test Planning Scripting Hardware Design Problem Solving Microarchitecture Assertion Based Verification (Show More) Formal Verification Embedded C Jasper Sva Usb3.x Ltssm Systemverilog System On A Chip (Soc) Application-specific Integrated Circuits (Asic) Universal Verification Methodology (Uvm) Verilog C Matlab Simulink Xilinx Vivado Ni Labview Arduino Ide Jupyter C++ Python Vhdl Microsoft Office Management Leadership Teamwork English Urdu Hindi Code Composer Studio Systemverilog (Basics) Design Verification Soc Verifiction
3rdiTech Inc. Delhi	Design Engineer	2.6yrs	Base: ₹19.3lakhs Stocks: - Bonus: - CTC:₹19.3lakhs		Xilinx Vivado Tcl Logic Synthesis/ Fpga Image Digital Logic Design/ Computer Architecture Asic/ Soc/ Fpga Flow Debugging/ Lint / Simulations (Show More) Cdc/sta Verilog/system Verilog Microarchitecture Communication Fifo Fpga Asic Digital Logic Design Debugging Cadence Simvision Git Linux Computer Architecture C++ C C, C++ Rtl Design Research Data Structures Circuit Design Object-oriented Programming (Oop) Very-large-scale Integration (Vlsi) Digital Electronics Matlab Verilog Problem Solving Management Leadership Public Speaking Teamwork Electronic Circuit Design Universal Verification Methodology (Uvm) System Verilog Apb Axi I2c Functional Verification Rtl Verification Synopsys Vcs Cadence Incisive Electronics Hardware Design Cmos

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Frequently asked questions

How much do Xilinx Vivado employees make?

Employees who know Xilinx Vivado earn an average of ₹28.3lakhs, mostly ranging from ₹19.8lakhs per year to ₹58.0lakhs per year based on 11 profiles. The top 10% of employees earn more than ₹44.8lakhs per year.

What is the average salary of Xilinx Vivado?

Average salary of an employee who know Xilinx Vivado is ₹28.3lakhs.

What is the median salary offered who know Xilinx Vivado?

The median salary approximately calculated from salary profiles measured so far is ₹23.9lakhs per year.

How is the age distributed among employees who know Xilinx Vivado?

45% of employees lie between 26-31 yrs . 18% of the employees fall in the age group of 21-26 yrs .

Frequently asked questions

How much do Xilinx Vivado employees make?

What is the average salary of Xilinx Vivado?

Average salary of an employee who know Xilinx Vivado is ₹28.3lakhs.

What is the median salary offered who know Xilinx Vivado?

The median salary approximately calculated from salary profiles measured so far is ₹23.9lakhs per year.

How is the age distributed among employees who know Xilinx Vivado?

45% of employees lie between 26-31 yrs . 18% of the employees fall in the age group of 21-26 yrs .

Salary Brackets

Percentage
10-20 lakhs	10-20 lakhs Percentage : 36
20-30 lakhs	20-30 lakhs Percentage : 18
30-40 lakhs	30-40 lakhs Percentage : 27
40-50 lakhs	40-50 lakhs Percentage : 9
> 50 lakhs	> 50 lakhs Percentage : 9

Age Brackets

Percentage
21-26 yrs	21-26 yrs Percentage : 18
26-31 yrs	26-31 yrs Percentage : 45
31-36 yrs	31-36 yrs Percentage : 9
> 41 yrs	> 41 yrs Percentage : 9

Skills

Trending

xilinx vivado

100 %

verilog

0 %

matlab

0 %

c++

0 %

cadence virtuoso

0 %

microarchitecture

0 %

Schools

Top

Government College of Technology

18 %

Kongu Polytechnic College

18 %

Anurag Group of Institutions

9 %

Birla Institute of Technology And Science (BITS)

9 %

Birla Institute of Technology and Science

9 %

Christ University

9 %

Indian Institute of Technology Hyderabad (IIT-H)

9 %

Xilinx Vivado Salaries

Average salary is ₹28.3lakhs.

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How much do Xilinx Vivado employees make?

What is the average salary of Xilinx Vivado?

What is the median salary offered who know Xilinx Vivado?

How is the age distributed among employees who know Xilinx Vivado?

How much do Xilinx Vivado employees make?

What is the average salary of Xilinx Vivado?

What is the median salary offered who know Xilinx Vivado?

How is the age distributed among employees who know Xilinx Vivado?

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